Audio annunciators are used in mobile and other communications devices, such as cell phones, speaker phones, etc., wherein an audio signal is amplified and provided to a speaker load. In applications such as cell phones and other mobile systems, the amplifier is powered by batteries, and hence power consumption is an important design consideration. Several driver or amplifier design choices are available for amplifying audio signals in such devices. Many mobile system amplifiers employ complementary transistor pairs or h-bridge networks to drive a speaker load. In Class A, B, and AB amplifiers, the drive transistors are generally operated in a linear mode, whereas Class D amplifier transistors are switched between two distinct states (e.g., full on or full off).
Typical Class AB amplifiers are capable of achieving respectable signal-to-noise plus distortion ratios (SNDR), for example, about 80 dB for audio applications, but have poor efficiency ratings, such as about 30 to 40% or less. For mobile applications, such as high-quality multi-media and audio polyphonic ringers for laptop computers and mobile phones, the efficiency shortcomings of such amplifiers can lead to over-heating problems and excessive power consumption. Because of the switch mode operation, Class D amplifiers offer power consumption efficiency advantages that are desirable in mobile phones and other battery-powered systems where audio amplification is needed. For example, for cell phones having an 8 OHM speaker load, Class AB amplification can result in 600 mW power dissipation, while Class D amplifiers may dissipate only about 40–50 mW.
FIG. 1 illustrates a conventional Class D amplifier 10 for driving an audio load L (e.g., a speaker) using an h-bridge 30 with transistor switches SW1–SW4. The amplifier 10 includes an integrator 14 that receives a differential analog input signal 12 and a feedback signal from the h-bridge 30 and provides a differential input to plus terminals of two comparators 16a and 16b. The minus terminals of the comparators 16 are coupled with a triangle-wave input signal from a ramp generator 18, and the comparators provide a pair of pulse width modulated (PWM) signals to a logic circuit 20. The logic circuit 20 provides switching signals S1–S4 to the h-bridge 30 so as to selectively activate the switches SW1–SW4, respectively, whereby the load L is selectively coupled with positive and negative voltages V+ and V−, respectively.
Although consuming less power, Class D amplifiers such as the amplifier 10 in FIG. 1 suffer from low power supply rejection ratio (PSRR), thus requiring the addition of voltage regulation components for the power source that provides the amplifier power rails V+ and V−. Furthermore, conventional Class D amplifiers suffer from poor SNDR performance, typically in the 55 to 65 dB range with 0.05 to 0.10% power supply distortion. As shown in FIG. 1, the h-bridge 30 is prone to additive power supply noise from the supply rails V+ and V−, which is seen by the load L. In addition, the ramp generator 18 and the quantization noise of the comparators 16 create harmonic distortion at the load L. While providing the feedback from the load L to the integrator 14 helps alleviate the h-bridge distortion, this closed loop folds the harmonic noise of the PWM signals and the ramp generator 18 into the audio band, thus degrading the audio quality of the amplifier system 10. The integrator is typically limited to first order filtering (e.g., single pole and zero) in order to avoid instability problems associated with second or higher order filtering, whereby the PSRR and SNDR capabilities of the conventional Class D amplifier 10 are generally limited. Accordingly, there is a need for improved amplifiers that provide better efficiency, power supply noise rejection, and signal-to-noise plus distortion rejection capabilities.